FIG. 1 is a cross sectional view schematically illustrating a conventional finFET semiconductor device formed using a recess etch. A conventional finFET semiconductor device 100 may include a substrate 105 and a channel region 120 having a fin shape 110 on the substrate 105. The conventional finFET semiconductor device 100 may include a gate stack 150 on atop surface of the channel region 120. The gate stack 150 extends down sidewall surfaces of the fin 110 between a source region 130 and a drain region 140. In this manner, an inversion or depletion region may be formed on opposing sidewalls of the channel 120 during device operation in response to a voltage applied to the gate stack 150.
The source and drain regions 130, 140 may be formed by removing semiconductor material on sides of the channel region 120 by a recess etch and epitaxially regrowing the source region 130 and the drain region 140 in the recessed regions on opposing sides of the channel region 120.
The effective channel length (Leff) of the device 100 is the net effective distance between the interior edges of the source and drain regions 130, 140. The source and drain regions 130, 140 generally have a doping level of about 1E19 cm−3 adjacent to the channel 120. The gate length (Lgate) of the device 100 refers to the width of the gate stack 150 excluding the sidewall spacers 152, which may be formed on opposite sides of the gate adjacent the source and drain regions 130, 140 to complete the gate electrode structure. Thus, in general, the effective channel length Leff and the gate length Lgate may not be equal.
A number of device characteristics of a finFET device may depend on the effective channel length Leff of the device. For example, the off-state (leakage) current Ioff of a finFET device and the on-state effective drive current, Ieff may decrease (increase) as the Leff of the device increases (decreases).
FIG. 2A is a cross sectional view schematically illustrating another conventional finFET semiconductor device formed without a recess etch, while FIG. 2B is a cross-sectional view taken along the line A-A′ of FIG. 2A. In particular, a finFET semiconductor device 200 may include a substrate 205 and a channel region 220 having a fin shape 210 on the substrate 205. The finFET semiconductor device 200 includes a gate stack 250 on a top surface of the channel region 220. The gate stack 250 extends down sidewall surfaces of the fin 210. A source region 230 and a drain region 240 may be epitaxially grown around the fin 210 on opposing sides of the channel region 220. A sidewall spacer 252 may be formed on opposite sides of the gate stack adjacent the source and drain regions 230, 240.